I just put up a more readable MMM01 documentation on my wiki, check it out. While I implemented the mapper already in MESS, I found some small issues with it that I’ll send a pull request over soon.
If you have any idea what the unknown bit might be there for, drop me a line as my test setup is still in one piece 🙂 I’ve already tried:
- it’s not part of the #WE for the lower 5 bits of RA
- it’s not part of the mask for the lower 5 bits of RA, i.e. cannot fix RA14 and trick zero-adjust
- setting the bit does not prevent #RAM_CS (and RAM_CS) from asserting when RAMG == 0x0A
- setting the bit does not automatically make the mux bit toggle when mapped and switching MBC1 modes
- setting the bit does not allow writing to RA22..RA21, RA20..RA19, AA16..AA15 when mapped
- setting the bit does not allow changing the multiplexer bit
- setting the bit does not allow resetting the map enable bit
- setting the bit does not ‘capture’ the MBC1 mode from the first write to the MODE register after mapping
